Assessment of Au Stud-Solder Interconnection for Fine Pitch Flip Chip Packaging

In this paper, we report the experimental findings in the development of fine pitch flip chip interconnect using Au stud bumps on solder-on-pad finish substrate. The package consists of a 6 mm x 6 mm test die flip chip attached on a 10 mm times 10 mm substrate. Au stud bumping technology is employed to provide both the uncoined and coined stud bumps on the peripheral bond pads of test die at a pitch of 60 mum and 80 mum. It is found that a two-step bonding profile with a higher substrate preheat (stage) temperature is preferred in forming the Au stud-solder joint. Generally, the uncoined bumps require a lower bond force to achieve a stable electrical connection as compared to the coined bumps. For fine pitch Au stud-solder joints assembly, X-Y alignment and coplanarity of the bonding surfaces were found to be critical. A good process control is necessary to meet the requirements for accurate Au stud bump placement with respect to bond pad center, Au bump height coplanarity and solder volume on the substrate Cu pad.