DocumentCode
3161759
Title
UltraSPARC ™ -I Emulation
Author
James Gateley
Author_Institution
SPARC Technology, Sun Microsystems, Inc., Mountain View, CA
fYear
1995
fDate
12-16 June 1995
Firstpage
13
Lastpage
18
Abstract
The next generation UltraSPARC-I CPU represents a significant step forward in processor performance at the cost of increased design complexity. Added complexity increases the risks in achieving functionally correct first silicon. Existing design verification techniques were supplemented by applying emulation to obtain an early look at functionality. Discussed are the goals, methods and results of the UltraSPARC-I emulation.
Keywords
Computational modeling; Computer bugs; Computer simulation; Databases; Emulation; Hardware; Permission; Process design; Silicon; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1995. DAC '95. 32nd Conference on
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
0-89791-725-1
Type
conf
DOI
10.1109/DAC.1995.250035
Filename
1586669
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