• DocumentCode
    3161807
  • Title

    Modelling and characterisation of the polymer stud grid array (PSGA) package: electrical, thermal and thermo-mechanical qualification

  • Author

    Chandrasekhar, Arun ; Vandevelde, Bart ; Driessens, Evelien ; Pieters, Philip ; Beyne, Eric ; De Raedt, Walter ; Nauwelaers, Bart ; Van Puymbroeck, Jef

  • Author_Institution
    IMEC, Leuven, Belgium
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    141
  • Lastpage
    148
  • Abstract
    We characterise the polymer stud grid array (PSGA) package electrically, thermally and thermomechanically for successful commercial application. For the electrical characterisation, we extract lumped parameter RLC (resistance-inductance-capacitance) models for the interconnects from simulations. We also measure the RF performance of the package on test structures and also by mounting an RF chip on the PSGA. The average self-inductance from the wirebond pad to the bottom of the stud is 1 nH and the capacitance to the ground is 0.35 pF for the PSGA with `Over The Edge´ (OTE) interconnection. The lumped RLC model verified by full 3D electromagnetic simulations and is found to be valid at least up to 10 GHz. Simulation models also indicate that the `Micro-via´ (μ-via) type of interconnection on the PSGA package improves performance by decreasing the inductance on an average by 60%. Thermal characterisation involves the development of a steady-state thermal compact model with 6 nodes for the 72-pin PSGA. We also perform transient thermal measurements on test packages to fine-tune the detailed model. For the thermo-mechanical case we test the first level and second level reliability by experiments and optimise them using simulations. The board level reliability for the 72-pin PSGA mounted on a PCB is very high (N50%>10000 cycles). Simulations also show a higher reliability for the PSGA than the PBGA (plastic ball grid array)
  • Keywords
    packaging; polymers; 10 MHz; 3D electromagnetic simulation; Micro-via interconnection; Over The Edge interconnection; PCB; RF chip; capacitance; electrical characteristics; lumped parameter RLC model; polymer stud grid array package; self-inductance; steady-state thermal compact model; thermomechanical reliability; Capacitance; Electrical resistance measurement; Electromagnetic modeling; Inductance; Packaging; Polymers; Radio frequency; Semiconductor device measurement; Testing; Thermomechanical processes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2001. Proceedings., 51st
  • Conference_Location
    Orlando, FL
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-7038-4
  • Type

    conf

  • DOI
    10.1109/ECTC.2001.927709
  • Filename
    927709