An evaluation of asynchronous and synchronous design for superscalar architectures

The high performance of superscalar architectures is obtained through the simultaneous execution of several machine operations upon multiple functional units. Traditional synchronous design techniques restrict the operation of these functional units to worst-case performance within discrete globally determined periods of time. However, asynchronous design techniques do not suffer from these restrictions, and so potentially promote greater utilisation of the functional units and therefore higher performance. This paper presents results from an empirical study that has been undertaken to assess the effect of asynchronous versus synchronous design techniques on the overall machine performance, and the utilisation of hardware resources. The results suggest that asynchronous design increases the opportunities for instructions to use functional units, potentially allowing equivalent performance to synchronous processors, but requiring fewer hardware resources