DocumentCode :
3161949
Title :
Consideration of mechanical chip crack on FBGA packages
Author :
Kiyono, Satsuo Steven ; Yonehara, Katsuyuki ; Graf, Richard S. ; Howell, Wayne J.
Author_Institution :
IBM Japan, Yasu, Japan
fYear :
2001
fDate :
2001
Firstpage :
193
Lastpage :
197
Abstract :
The laminate type FBGA package is one of the advanced solution of economic chip scale package, and has started to be used for applications that require low profiles and small areas, such as cellular phones or hand held products. IBM started to use “Mold and Saw” or “Matrix” type FBGA package, a technology to align plural numbers of semiconductor chips on a segment area of the laminate, wire bond, transfer mold, then finally singulate by a dicing saw. The ability to dice the package size independent to the molding chase or punching equipment is the largest benefit of this technology. During the development stage, IBM had observed a phenomenon that the chips were completely separated into two or more segments. Initially the root cause was suspected to be the CTE difference of the materials that generates mechanical warpage to the laminate, but simulational analysis showed no impact. To solve the phenomenon, we discovered the correlation of the laminate profile, solder mask thickness variations, and mechanical stresses on the chip surface. A `bath tub” shaped solder mask profile at the center of chip placement area on the laminate may cause excessive pressure on the chip during transferring mold compound, and result in chip fractures. Experiments using several variations of laminate profiles were used, and confirmed the larger profile can generate chip cracks. This paper contains details of the phenomenon
Keywords :
ball grid arrays; chip scale packaging; cracks; fine-pitch technology; laminates; FBGA package; Matrix package; Mold and Saw package; bath tub profile; cellular phone; chip scale package; dicing saw; fracture crack; hand held product; laminate profile; mechanical stress; semiconductor chip; solder mask thickness; transfer molding; wire bonding; Analytical models; Bonding; Cellular phones; Chip scale packaging; Laminates; Packaging machines; Punching; Semiconductor device packaging; Stress; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2001. Proceedings., 51st
Conference_Location :
Orlando, FL
ISSN :
0569-5503
Print_ISBN :
0-7803-7038-4
Type :
conf
DOI :
10.1109/ECTC.2001.927717
Filename :
927717
Link To Document :
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