Test generation in a distributed environment

This paper describes a distributed test generation system for combinational circuits. It is made up of modules running on computers connected via a local area network. Issues in parallelizing the tasks between the various modules are discussed, with comparison to previous work in the field. The concepts of independent faults, independent fault sets, and fault partitioning are shown to be the key points in performing useful parallel computations. Experimental results with a heterogeneous computer network prove that a satisfactory speedup can be obtained, although saturation occurs at a point depending on the circuit´s characteristics