DocumentCode
3162135
Title
Fast Identification of Robust Dependent Path Delay Faults
fYear
1995
fDate
1995
Firstpage
119
Lastpage
125
Abstract
Recently, it has been shown in [1] and [2] that in order to verify the correct timing of a manufactured circuit not all of its paths need to be considered for delay testing. In this paper, a theory is developed which puts the work of these papers into a common framework, thus allowing for a better understanding of their relation. In addition, we consider the computational problem of identifying large sets of such not-necessary-to-test paths. Since the approach of [1] can only be applied for small scale circuits, we develop a new algorithm which trades quality of the result against computation time, and allows handling of large circuits with tens of millions of paths. Experimental results show that enormous improvements in running time are only paid for by a small decrease in quality.
Keywords
Circuit faults; Circuit testing; Computer aided manufacturing; Computer science; Delay; Digital circuits; Fault diagnosis; Logic testing; Robustness; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1995. DAC '95. 32nd Conference on
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
0-89791-725-1
Type
conf
DOI
10.1109/DAC.1995.250075
Filename
1586688
Link To Document