DocumentCode :
3162361
Title :
Process Development and Solder Joint Reliability of a New Lead-Free Solder: Sn3wt%Ag0.5wt%Cu0.019wt%Ce (SACC)
Author :
Lau, John ; Liu, Sang ; Shangguan, Dongkai ; Song, Zhi Wei ; Geiger, David
Author_Institution :
Inst. of Microelectron., Singapore
fYear :
2007
fDate :
10-12 Dec. 2007
Firstpage :
546
Lastpage :
552
Abstract :
The effects of a very low level (0.019wt%) of doping of Ce (cerium) on the SnAgCu (SAC) solder joints of lead-free PQFP (plastic quad flat pack), PBGA (plastic ball grid array), wafer-level chip scale package (WLCSP), and BCC (bumped chip carrier) components on lead-free PCB (printed circuit boards) are investigated in this study. Emphasis is placed on the PCA (PCB assembly) process developments and the solder joint reliability of these components on PCB with the newly proposed lead-free solder: Sn3wt%Ag0.5wt%Cu0.019wt%Ce (SACC). For process development of the SACC, important parameters such as the stencil printing, solder paste volume, void, and reflow temperature are determined and discussed. For SACC solder joint reliability, the mechanical fatigue of PQFP, PBGA, CSP, and BCC on PCB has been determined by 4-point bending fatigue tests. The test samples are prepared with 5 different aging conditions, namely, room temperature, 150degC for 1 hour, 150degC for 10 days, 150degC for 20 days, and 150degC for 30 days. After the tests, failure analyses have been performed and the IMC (intermetallic compound) thickness due to aging has also been determined and examined by SEM (scanning electron microscopy) and EDX (energy dispersive X-ray spectrometry).
Keywords :
ball grid arrays; cerium; copper alloys; failure analysis; fatigue testing; plastic packaging; printed circuits; reflow soldering; reliability; scanning electron microscopy; silver alloys; tin alloys; wafer level packaging; PCB assembly; SEM; SnAgCu:Ce; bumped chip carrier; energy dispersive X-ray spectrometry; failure analysis; four-point bending fatigue tests; intermetallic compound; lead-free solder; mechanical fatigue; plastic ball grid array; plastic quad flat pack; printed circuit boards; reflow temperature; scanning electron microscopy; solder joint reliability; solder paste volume; stencil printing; temperature 150 C; temperature 293 K to 298 K; time 1 hour; time 10 day; time 20 day; time 30 day; voids; wafer-level chip scale package; Aging; Electronics packaging; Environmentally friendly manufacturing techniques; Fatigue; Lead; Plastics; Scanning electron microscopy; Soldering; Temperature; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 2007. EPTC 2007. 9th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-1323-2
Electronic_ISBN :
978-1-4244-1323-2
Type :
conf
DOI :
10.1109/EPTC.2007.4469811
Filename :
4469811
Link To Document :
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