DocumentCode :
3162573
Title :
A Survey of Optimization Techniques Targeting Low Power VLSI Circuits
Author :
Srinivas Devadas, Sharad Malik
Author_Institution :
Massachusetts Institute of Technology, Department of EECS
fYear :
1995
fDate :
1995
Firstpage :
242
Lastpage :
247
Abstract :
We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are considered.
Keywords :
low power; optimization; synthesis; Delay; Design optimization; Diodes; Leakage current; Logic circuits; Optimization methods; Parasitic capacitance; Power dissipation; Switching circuits; Very large scale integration; low power; optimization; synthesis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1995. DAC '95. 32nd Conference on
Conference_Location :
San Francisco, CA
ISSN :
0738-100X
Print_ISBN :
0-89791-725-1
Type :
conf
DOI :
10.1109/DAC.1995.250098
Filename :
1586710
Link To Document :
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