Logic Extraction and Factorization for Low Power

This paper describes algebraic procedures for node extraction and factorization that target low power consumption. New power cost functions are introduced for the sum-of-products and factored form representations of functions. These cost functions are then used to guide the power optimization procedures. It is also shown that using the proposed SOP power cost function, all extractions resulting in a power reduction will not result in an increase in the number of literals in the network. The procedures described in this paper were implemented and results show 16% average improvement in power at the cost of 7% average increase in area.