Computer design strategy for MCM-D/flip-chip technology

A compelling case is made for using MCM-D (thin film MultiChip Module) flip-chip technology to build a `MegaChip´ CPU consisting of an Instruction Fetch Unit and Execution Unit. By building part of the Instruction Fetch Unit in an optimized SRAM process, significant performance/cost gains are made. We also address the following important `implementation´ (1) Partitioning high speed paths across the chip boundary within timing specs; (2) Ability to use off-the-shelf memories; (3) Using the MCM for power, ground, and clock distribution; (4) Managing test costs; and (5) implementing a debug strategy. This paradigm is also potentially useful for other memory intensive applications, including ATM, etc