Title :
Analysis of Switch-Level Faults by Symbolic Simulation
Author :
Lluis Ribas-Xirgo, Jordi Carrabina-Bordoll
Author_Institution :
Centre Nacional de Microelectronica, CNM (CSIC), Universitat Autonoma de Barcelona, UAB, Campus UAB, Bellaterra, Barcelona, Spain
Abstract :
This paper presents a symbolic method to detect short and open circuit faults in switch-level networks. Detection and fault sensitization vector determination are possible since the behavior of each node is described by a set of two functions: the on-set and the off-set functions. Their analyses provide designers with an efficient tool for circuit verification and test pattern generation.
Keywords :
Analytical models; Boolean functions; Circuit analysis; Circuit faults; Circuit simulation; Electrical fault detection; Fault detection; Permission; Switching circuits; Test pattern generators;
Conference_Titel :
Design Automation, 1995. DAC '95. 32nd Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-89791-725-1
DOI :
10.1109/DAC.1995.249972
