Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs

A new approach for performance-driven routing in highly congested high speed MCMs and PCBs is presented. Global routing is employed to manage delay, signal integrity and congestion simultaneously. Interconnect performance prediction models are generated through simulations. The global routing results and performance prediction models are used to generate bounds on the net lengths which can be used by a detailed router to satisfy constraints on interconnect performance.