DocumentCode :
3163068
Title :
Development of advanced 3D chip stacking technology with ultra-fine interconnection
Author :
Takahashi, Kenji ; Hoshino, Masataka ; Yonemura, Hitoshi ; Tomisaka, Manabu ; Sunohara, Masahiro ; Tanioka, Michinobu ; Sato, Tomotoshi ; Kojima, Kazumi ; Terao, Hiroshi
Author_Institution :
Assoc. of Super-Adv. Electron. Technol., Tsukuba Center Inc., Ibaraki, Japan
fYear :
2001
fDate :
2001
Firstpage :
541
Lastpage :
546
Abstract :
The development of 3D chip stacking technology with ultra-fine pitch interconnection initiated in 1999, which is a part of “Ultra High-Density Electronic System Integration” project. The development involves the backend of wafer fabrication process, packaging and testing. The extended study revealed possibilities and advantages of 3D chip stacking structure with ultra-fine interconnection
Keywords :
fine-pitch technology; integrated circuit interconnections; integrated circuit packaging; 3D chip stacking technology; electronic packaging; process integration; ultra-fine-pitch interconnection; ultra-high-density electronic system integration; wafer fabrication; wafer testing; Chip scale packaging; Electronics packaging; Etching; Fabrication; Integrated circuit interconnections; Integrated circuit technology; Large scale integration; Stacking; Testing; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2001. Proceedings., 51st
Conference_Location :
Orlando, FL
ISSN :
0569-5503
Print_ISBN :
0-7803-7038-4
Type :
conf
DOI :
10.1109/ECTC.2001.927780
Filename :
927780
Link To Document :
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