VLSI design of the reassembly management for ATM/AAL

Author

Chang, Ching-Lung ; Chen, Sue-Train ; Chu, Yuan-Sun ; Chen, Kim-Joan

Author_Institution

Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan

fYear

1996

fDate

23-27 Sep 1996

Firstpage

115

Lastpage

118

Abstract

The reassembly management is one of the key components in the ATM receiving function. To achieve high memory efficiency, we adopt a shared memory approach with the linked-list structure to support the ATM/AAL reassembly management. The chip with the die size 6570×6490 μm ² and packaged in a 144-pin CQFP is fabricated by using TSMC 0.8 μm SPDM N-well CMOS technology. The designed chip can simultaneously support 256 connections and manage 3 Mbytes of the receiving buffer

Keywords

CMOS digital integrated circuits; VLSI; application specific integrated circuits; asynchronous transfer mode; network interfaces; shared memory systems; storage management; 0.8 micron; 144-pin CQFP; ATM network interface; ATM receiving function; ATM/AAL layer; TSMC SPDM N-well CMOS technology; VLSI design; high memory efficiency; linked-list structure; reassembly management; shared memory approach; Application specific integrated circuits; Asynchronous transfer mode; CMOS technology; Content management; Hardware; Memory management; Read-write memory; Space technology; Switches; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International

Conference_Location

Rochester, NY

ISSN

1063-0988

Print_ISBN

0-7803-3302-0

Type

conf

DOI

10.1109/ASIC.1996.551974

Filename

551974