• DocumentCode
    3163985
  • Title

    Reference Voltage Generation for Single-Ended Memory Interfaces

  • Author

    Hollis, Timothy M. ; Dimitriu, Dragos

  • Author_Institution
    Micron Technol. Inc. Boise, Boise, ID
  • fYear
    2009
  • fDate
    3-3 April 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    While most aspects of single-ended signaling interfaces do not change from one generation to the next, certain topological changes may enhance the robustness of single-ended schemes at higher datarates. Reference voltage (VREF) generation is critical to maintaining sufficient signaling margins and thus demands attention. This paper discusses VREF generation and introduces a VREF architecture which provides static level tuning while tracking dynamic power supply variation.
  • Keywords
    DRAM chips; circuit tuning; network topology; power supply circuits; reference circuits; signalling; SDRAM; dynamic power supply variation; reference voltage generation; signaling interfaces; single-ended memory interfaces; static level tuning; topological changes; Bandwidth; Circuits; Logic devices; Power generation; Power supplies; Signal design; Signal generators; Timing; Transmitters; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics and Electron Devices, 2009. WMED 2009. IEEE Workshop on
  • Conference_Location
    Boise, ID
  • Print_ISBN
    978-1-4244-3551-7
  • Electronic_ISBN
    978-1-4244-3552-4
  • Type

    conf

  • DOI
    10.1109/WMED.2009.4816150
  • Filename
    4816150
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3163985