• DocumentCode
    3164057
  • Title

    A signed hypergraph model of constrained via minimization

  • Author

    Shi, Chum-Jin Richard

  • Author_Institution
    Dept. of Comput. Sci., Waterloo Univ., Ont., Canada
  • fYear
    1992
  • fDate
    28-29 Feb 1992
  • Firstpage
    159
  • Lastpage
    166
  • Abstract
    The author proposes a use of the notion of hypergraphs to describe the general constrained via minimization (CVM) problem. He shows that the formulation of the general CVM by means of hypergraphs turns out to be surprisingly simple and general. In the case of two-layer routing, a signed hypergraph model is introduced. On the basis of this model, the author develops a fast (linear-time) heuristic and obtains promising results; he also presents two methods of modeling multiway splits by graphs, producing better results than all the previous methods
  • Keywords
    circuit layout CAD; constrained via minimization; signed hypergraph model; two-layer routing; Circuit synthesis; Computer science; Integrated circuit layout; Minimization; Multichip modules; Pins; Printed circuits; Routing; Very large scale integration; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI, 1992., Proceedings of the Second Great Lakes Symposium on
  • Conference_Location
    Kalamazoo, MI
  • Print_ISBN
    0-8186-2610-0
  • Type

    conf

  • DOI
    10.1109/GLSV.1992.218350
  • Filename
    218350