Title :
A signed hypergraph model of constrained via minimization
Author :
Shi, Chum-Jin Richard
Author_Institution :
Dept. of Comput. Sci., Waterloo Univ., Ont., Canada
Abstract :
The author proposes a use of the notion of hypergraphs to describe the general constrained via minimization (CVM) problem. He shows that the formulation of the general CVM by means of hypergraphs turns out to be surprisingly simple and general. In the case of two-layer routing, a signed hypergraph model is introduced. On the basis of this model, the author develops a fast (linear-time) heuristic and obtains promising results; he also presents two methods of modeling multiway splits by graphs, producing better results than all the previous methods
Keywords :
circuit layout CAD; constrained via minimization; signed hypergraph model; two-layer routing; Circuit synthesis; Computer science; Integrated circuit layout; Minimization; Multichip modules; Pins; Printed circuits; Routing; Very large scale integration; Wire;
Conference_Titel :
VLSI, 1992., Proceedings of the Second Great Lakes Symposium on
Conference_Location :
Kalamazoo, MI
Print_ISBN :
0-8186-2610-0
DOI :
10.1109/GLSV.1992.218350