Title :
Timed binary decision diagrams
Author :
Li, Zhongcheng ; Zhao, Yuhong ; Min, Yinghua ; Brayton, Robert K.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
The paper presents an extension to OBDDs with timing information, called timed binary decision diagrams (TBDDs). TBDDs are also canonical and allow the symbolic manipulation of Boolean functions with timing information. A TBDD software package is implemented based on the existing CMU BDD package. Experimental results demonstrate the efficiency of the TBDDs in representing circuits with both functional and timing information
Keywords :
Boolean functions; diagrams; logic CAD; symbol manipulation; timing; Boolean functions; CMU BDD package; canonical timed binary decision diagrams; functional information; software package; symbolic manipulation; timing information; Binary decision diagrams; Boolean functions; Circuits; Computers; Data structures; Fault tolerance; Logic testing; Packaging; Software packages; Timing;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-8206-X
DOI :
10.1109/ICCD.1997.628894
