DocumentCode :
3165271
Title :
A 32-bit microprocessor based on the TRON architecture: Design of the GMicro/100
Author :
Shimizu, Toru ; Yoshida, Toyohiko ; Saito, Yuichi ; Matsuo, Masahito ; Enomoto, Tatsuya
Author_Institution :
Mitsubishi Electr. Corp., Itami, Japan
fYear :
1988
fDate :
Feb. 29 1988-March 3 1988
Firstpage :
30
Lastpage :
33
Abstract :
The special features of the GMicro/100 are covered, including the branching and pipelining methodologies as well as system modeling and verification. The GMicro/100 design strategies are briefly described.<>
Keywords :
computer architecture; microprocessor chips; 32 bit; 32-bit microprocessor; GMicro/100; TRON architecture; branching; design strategies; pipelining; system modeling; verification; Application software; Arithmetic; Central Processing Unit; Computer architecture; Control systems; Decoding; Large scale integration; Microprocessors; Pipelines; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compcon Spring '88. Thirty-Third IEEE Computer Society International Conference, Digest of Papers
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-0828-5
Type :
conf
DOI :
10.1109/CMPCON.1988.4823
Filename :
4823
Link To Document :
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