• DocumentCode
    3165559
  • Title

    Interfacial adhesion study for copper/SiLK interconnects in flip-chip packages

  • Author

    Miller, Mikel R. ; Ho, Paul S.

  • Author_Institution
    Lab. for Interconnect & Packaging, Texas Univ., Austin, TX, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    965
  • Lastpage
    970
  • Abstract
    This paper presents the results of a two-part study to determine the fracture toughness of relevant interfaces within Cu/SiLK low-k interconnect structures and relate those data to the actual driving force for interfacial crack propagation within a flip-chip structure. In the first part, critical adhesion data were obtained for samples containing SiLK in various configurations with Si3N4 , SiO2, Ta and TaN. In the second part, these data are compared to the crack driving force for a flip-chip structure containing a small interfacial delamination in the vicinity of the Cu/Low-k interconnect structure, determined previously via phase-shifting moire interferometry (PSMI) and finite element analysis (FEA). In this study, the model was used to examine the effect of geometry and material properties on the deformation state, mode-mixity and crack driving force for a thermal load, ΔT=-143°C. Results show that the deposition of Ta, TaN and Si3N4 onto SiLK weakened the underlying SiLK/Si3N4 interface by 30-50%. The weakest interface tested was formed by the deposition of SiO2 onto SiLK. However, the adhesion of all tested SiLK interfaces was 100-1000% greater than the crack driving force. From FEA it is shown that the crack driving force and mode-mixity are relatively insensitive to package geometry and most sensitive to the properties of the printed circuit board (PCB). In terms of PCB properties, the combination of low CTE and high modulus was found to provide the optimal combination of driving force and mode-mixity
  • Keywords
    adhesion; copper; cracks; finite element analysis; flip-chip devices; fracture toughness; integrated circuit interconnections; integrated circuit packaging; moire fringes; Cu; Si3N4; SiO2; Ta; TaN; copper/SiLK interconnect; crack driving force; deformation state; finite element analysis; flip-chip package; fracture toughness; interfacial adhesion; interfacial crack propagation; low-k dielectric; mode-mixity; phase-shifting moire interferometry; printed circuit board; Adhesives; Copper; Deformable models; Delamination; Finite element methods; Geometry; Integrated circuit interconnections; Phase shifting interferometry; Solid modeling; Thermal force;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2001. Proceedings., 51st
  • Conference_Location
    Orlando, FL
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-7038-4
  • Type

    conf

  • DOI
    10.1109/ECTC.2001.927924
  • Filename
    927924