Title :
Application of Boolean unification to logic synthesis
Author :
Poncino, Massimo
Author_Institution :
Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA
Abstract :
Boolean unification is a procedure to compute the solution of a given Boolean equation or formula. Many problems in the design of digital circuits have a natural formulation as a Boolean equation, and several methods have been developed in the past for the solution of Boolean equations. In this paper we review some new applications of Boolean unification to some problems that arise in CAD of digital circuits, that have been made possible by the breakthrough provided by BDDs in the manipulation of Boolean functions
Keywords :
Boolean functions; VLSI; logic CAD; BDDs; Boolean equation; Boolean unification; CAD; VLSI; binary decision diagrams; digital circuits design; logic synthesis; rectification; review; Boolean functions; Design automation; Very-large-scale integration;
Conference_Titel :
Electrical and Computer Engineering, 1994. Conference Proceedings. 1994 Canadian Conference on
Conference_Location :
Halifax, NS
Print_ISBN :
0-7803-2416-1
DOI :
10.1109/CCECE.1994.405811
