Title :
Comparison of scaled floating body RAM architectures
Author :
Collaert, N. ; Rosmeulen, M. ; Rakowski, M. ; Rooyackers, R. ; Witters, L. ; Veloso, A. ; Van Houdt, J. ; Jurczak, M.
Author_Institution :
IMEC, Heverlee
Abstract :
In this work, we have compared different FB-RAM architectures. Whereas highly doped PDSOI devices show high programming window and retention times for long channel devices, the SOI FinFET devices with WFIN=25 nm can be scaled down to LG=50 nm while still maintaining high cell margins and retention times. For the latter devices optimization of the write and especially read bias conditions is needed.
Keywords :
MOSFET; buried layers; memory architecture; optimisation; random-access storage; silicon-on-insulator; SOI FinFET devices; Si; buried oxide film; floating body RAM architectures; high programming window; highly doped partially depleted SOI devices; optimization; Conference proceedings; Doping; Fabrication; FinFETs; Impact ionization; Microelectronics; Random access memory; Read-write memory; Semiconductor films; Silicon on insulator technology;
Conference_Titel :
SOI Conference, 2008. SOI. IEEE International
Conference_Location :
New Paltz, NY
Print_ISBN :
978-1-4244-1954-8
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2008.4656282
