Title :
Optimum signal integrity through appropriate analysis of signal return path and power delivery
Author :
Chung, Chee-Yee ; Waizman, Alex
Author_Institution :
Intel Corp., Chandler, AZ, USA
Abstract :
This paper provides details of an IO design example for an optimized package and single sided motherboard. In specific, the analysis of optimum performance for IO returns path and power delivery through correct package stackup, precise placement of signal, power and ground (GND) pins, and bypass capacitors are provided
Keywords :
integrated circuit packaging; IC package; IO design optimization; bypass capacitor; pin placement; power delivery; signal integrity; signal return path; single sided motherboard; Capacitors; Cost function; Design optimization; Dielectrics; Frequency; Packaging; Performance analysis; Pins; Signal analysis; Signal design;
Conference_Titel :
Electronic Components and Technology Conference, 2001. Proceedings., 51st
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-7038-4
DOI :
10.1109/ECTC.2001.928017
