Title :
An inter-die variability compensation scheme for 0.42-V 486-kb FD-SOI SRAM using substrate control
Author :
Fujiwara, Hidehiro ; Takeuchi, Takashi ; Otake, Yu ; Yoshimoto, Masahiko ; Kawaguchi, Hiroshi
Author_Institution :
Grad. Sch. of Eng.,, Kobe Univ., Kobe
Abstract :
We propose a novel substrate-bias control scheme for FD-SOI SRAM that suppresses inter-die variability and achieves low-voltage operation. Substrate-bias control circuits automatically detect an inter-die threshold-voltage variation, and then maximize read/write margins of memory cells. We confirmed that a 486-kb SRAM operates at 0.42 V, in which an FS/SF corners can be compensated as much as 0.14 V or more.
Keywords :
SRAM chips; silicon-on-insulator; write-once storage; FD-SOI SRAM; Si; interdie threshold-voltage; low-voltage operation; memory cells; read-write operations; substrate-bias control circuits; voltage 0.42 V; Automatic control; Circuits; Conference proceedings; Detectors; MOS devices; Random access memory; Read-write memory; Semiconductor device measurement; Threshold voltage; Voltage control;
Conference_Titel :
SOI Conference, 2008. SOI. IEEE International
Conference_Location :
New Paltz, NY
Print_ISBN :
978-1-4244-1954-8
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2008.4656310
