Title :
SOI-GeOI hybrid substrates elaboration by Ge condensation: Process and electrical properties
Author :
Nguyen, Q.T. ; Damlencourt, J.F. ; Vincent, B. ; Loup, V. ; Cunff, Y. Le ; Gentil, P. ; Cristoloveanu, S.
Author_Institution :
IMEP-INP Grenoble-Minatec, Grenoble
Abstract :
The successful fabrication of hybrid SOI-GeOI wafers is reported. Process alternatives are documented by detailed characterizations. This co-integration achieves high hole mobility in Ge islands and high electron mobility in Si islands.
Keywords :
electron mobility; elemental semiconductors; germanium; hole mobility; materials preparation; silicon-on-insulator; Ge condensation; SOI-GeOI hybrid substrates; Si-Ge; electrical properties; electron mobility; hole mobility; silicon islands; Annealing; Conference proceedings; Electron mobility; Etching; Fabrication; MOSFET circuits; Microstrip; Oxidation; Semiconductor films; Substrates;
Conference_Titel :
SOI Conference, 2008. SOI. IEEE International
Conference_Location :
New Paltz, NY
Print_ISBN :
978-1-4244-1954-8
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2008.4656315
