An examination of empirically derived within-die local probabilities of failure

Given a wide range of circuit densities and types of structures that can be present on a modern day IC, it is not inconceivable that different regions on a die display varying degrees of yield sensitivity to defects. A methodology is developed in this paper that utilizes data derived from in-line defect inspection equipment such that in combination with back-end sort data local probabilities of failure for different regions of the die can be determined. The technique described here is essential to a model free approach towards yield prediction. Other potential applications of this methodology include defect review sampling