Title :
A cost model for VLSI/MCM systems
Author :
Kafrouni, M. ; Thibeault, C. ; Savaria, Y.
Author_Institution :
Dept. of Electr. Eng., Ecole de Technol. Superieure, Montreal, Que., Canada
Abstract :
The purpose of this paper is to compare different alternatives for a MCM implementation of a VLSI module, which targets high bandwidth video and image processing applications. The alternatives are related to MCM possible manufacturing flow. Specifically, this paper is concerned with how to deal with MCMs that are not fully functional at the first pass. Each alternative has a different flow to deal with such defective modules. A model, which reflects the MCM fabrication cost, is developed. In addition, this model is used to compare available alternatives, and to quantify the cost-benefit relationships between them taking into account most of the cost parameters, the yield of the various components/steps, and the various test strategy parameters encountered during a MCM fabrication
Keywords :
VLSI; digital signal processing chips; integrated circuit testing; integrated circuit yield; multichip modules; parallel architectures; real-time systems; video signal processing; MCM; VLSI; cost parameters; cost-benefit relationships; defective modules; high bandwidth video; image processing applications; manufacturing flow; test strategy parameters; yield; Assembly; Bandwidth; Costs; Digital signal processing; Fabrication; Image processing; Integrated circuit interconnections; Large-scale systems; Testing; Very large scale integration;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings., 1997 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
0-8186-8168-3
DOI :
10.1109/DFTVS.1997.628320
