Title :
Twin silicon nanowire FET (TSNWFET) On SOI with 8 nm silicon nanowires and 25 nm surrounding TiN gate
Author :
Kim, Dong-Won ; Li, Ming ; Yeo, Kyoung Hwan ; Yeoh, Yun Young ; Suk, Sung Dae ; Cho, Keun Hwi ; Oh, Kyungseok ; Lee, Won-Seong
Author_Institution :
Semicond. R&D Center, Samsung Electron. Co., Hwasung
Abstract :
In this work, fabrication of TSNWFET on SOI with down to 25-nm TiN surrounding gate and 8-nm silicon nanowires is reported with high manufacturability and improved device reliability including reduced junction and gate leakage currents by fully eliminating the bottom parasitic channel existing in previous TSNWFET on bulk Si. And high performance is also obtained to be 1124muA/mum and 1468muA/mum at off current of 1nA/mum for NMOS and PMOS, respectively.
Keywords :
elemental semiconductors; field effect transistors; leakage currents; nanoelectronics; nanowires; semiconductor device manufacture; semiconductor device reliability; semiconductor quantum wires; silicon; silicon-on-insulator; titanium compounds; SOI; Si-TiN; TSNWFET; gate leakage currents; semiconductor device reliability; size 25 nm; size 8 nm; twin silicon nanowire FET; FETs; Fabrication; Germanium silicon alloys; Leakage current; MOS devices; Nanoscale devices; Silicon germanium; Silicon on insulator technology; Temperature control; Tin; SOI; reliability; silicon nanowire; surrounding gate;
Conference_Titel :
SOI Conference, 2008. SOI. IEEE International
Conference_Location :
New Paltz, NY
Print_ISBN :
978-1-4244-1954-8
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2008.4656322
