A 200 MIPS single-chip 1 k FFT processor

A device is described which is capable of converting real or complex data from the time domain into the frequency domain, or vice versa. Its integrated dual-port workspace RAM, coefficient ROM, and multiple-resource data path allow the computation of a 1024-point complex transform in less than 100 mu s. No external memory is needed. Multiple devices can be connected in parallel to further increase processing benchmarks. The device can also be used as the core processor in the construction of large (>1 k) one- or two-dimensional transforms, but with additional external memory. Provision is also made for the computation of real-only data transforms with commensurate reductions in calculation time. Six devices in parallel will allow a 1 k transform to be computed at 40-MHz sample rate, equivalent to a 200-MHz radix-2 butterfly rate and an 800-MHz multiplication rate. The processor fabricated in 1.4- mu m CMOS technology, is designed for shrinking to a 1 mu m process. The die size is 13.16 mm*13.66 mm, and the device is assembled in an 84-pin PGA package. Power dissipation is 3 W with a 40-MHz system clock.<>