Scaling and soft errors: Moore of the same for SOI ?

The continued path on Moore´s Law has increased the concern about soft errors, even in terrestrial applications. Multiple device (multiple bit) interactions and upsets are now one of the major challenges of analysis and mitigation in bulk CMOS devices. This is perhaps the major advantage for SOI with respect to single event effects. New SOI devices, including the MugFETS and ZRAMs, present opportunities for additional detailed study of single event effects as the devices approach the mainstream. One of the interesting aspects of the ZRAM is the difference in data state vulnerabilities compared to the conventional bulk DRAMs.