• DocumentCode
    3168340
  • Title

    Ultra-scaled Z-RAM cell

  • Author

    Okhonin, S. ; Nagoga, M. ; Lee, C.-W. ; Colinge, J.P. ; Afzalian, A. ; Yan, R. ; Akhavan, N. Dehdashti ; Xiong, W. ; Sverdlov, V. ; Selberherr, S. ; Mazure, C.

  • Author_Institution
    Innovative Silicon, PSE-B, Lausanne
  • fYear
    2008
  • fDate
    6-9 Oct. 2008
  • Firstpage
    157
  • Lastpage
    158
  • Abstract
    Ultra-scaled Z-RAM cells based on MuGFETs are demonstrated for the first time. Effects of physical parameters such as channel doping concentration, fin width, and gate length on Z-RAM cell performance are discussed. Transient measurements and simulations prove that the basic operational principles are effective on Z-RAM cells with a gate length down to 12.5 nm.
  • Keywords
    CMOS integrated circuits; MOSFET; doping profiles; random-access storage; CMOS integrated circuits; MuGFETs; doping concentration; multiple-gate MOSFET; numerical simulation; ultrascaled Z-RAM memory cells; Bipolar transistors; Capacitors; Conference proceedings; Doping; MOSFETs; Performance evaluation; Random access memory; Scalability; Silicon; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference, 2008. SOI. IEEE International
  • Conference_Location
    New Paltz, NY
  • ISSN
    1078-621X
  • Print_ISBN
    978-1-4244-1954-8
  • Electronic_ISBN
    1078-621X
  • Type

    conf

  • DOI
    10.1109/SOI.2008.4656342
  • Filename
    4656342
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3168340