Title :
Suppression of DIBL and current-onset voltage variability in intrinsic channel fully depleted SOI MOSFETs
Author :
Hiramoto, T. ; Mizutani, T. ; Kumar, A. ; Nishida, A. ; Tsunomura, T. ; Inaba, S. ; Takeuchi, K. ; Kamohara, S. ; Mogami, T.
Author_Institution :
Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan
Abstract :
Intrinsic channel SOI MOSFETs were fabricated and their variability were compared with conventional bulk MOSFETs. It is found for the first time that, besides VTH variability, both DIBL variabitlity and current-onset voltage variability are well suppressed in the intrinsic channel SOI MOSFETs thanks to non-intentionally doped channel. Reduction of channel doping is essential to reduce the characteristics variability in scaled FETs.
Keywords :
MOSFET; semiconductor doping; silicon-on-insulator; VTH variability; channel doping reduction; current-onset voltage variability; drain induced barrier lowering suppression; intrinsic channel fully depleted SOI MOSFET; scaled FET; Current measurement; Electric potential; Gaussian distribution; Logic gates; MOSFETs; Resource description framework;
Conference_Titel :
SOI Conference (SOI), 2010 IEEE International
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-9130-8
Electronic_ISBN :
1078-621x
DOI :
10.1109/SOI.2010.5641063
