Low power camera-on-a-chip using CMOS active pixel sensor technology

A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory as a result of the continuing need to miniaturize space science imaging instruments. Implemented using standard CMOS, the active pixel sensor (APS) technology permits the integration of the detector array with on-chip timing, control and signal chain electronics, including analog-to-digital conversion. This paper describes the technology for implementing a low power camera-on-a-chip.