Implementation and validation of a new thermal model for analysis, design and characterisation of multichip power electronics devices

Author

Profumo, F. ; Facelli, S. ; Tenconi, A. ; Passerini, B.

Author_Institution

Dipt. di Ingegneria Elettrica, Bologna Univ., Italy

Volume

2

fYear

1997

fDate

5-9 Oct 1997

Firstpage

1253

Abstract

The goal of this paper is to present a new electro-thermal model for analysis, design and characterisation of multichip power electronics devices. The feature of this model is that it allows the junction temperature calculation for devices in which several chips are thermally interacting. In the first part of the paper the thermal and electrical parameters and submodels used for the simulation are described. Thus, the calculation procedure that allows determination of the chips temperature is illustrated. In the second part of the paper, some results related to a practical application for which the model has been used and the experimental validation of the model are presented

Keywords

multichip modules; p-n junctions; power semiconductor devices; semiconductor device models; thermal analysis; electrical parameters; electro-thermal model; junction temperature calculation; multichip power electronics devices; simulation; thermal model; thermal parameters; thermally interacting chips; Circuit topology; Electronic packaging thermal management; Electronics packaging; Impedance; Joining processes; Multichip modules; Power electronics; Rectifiers; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Industry Applications Conference, 1997. Thirty-Second IAS Annual Meeting, IAS '97., Conference Record of the 1997 IEEE

Conference_Location

New Orleans, LA

ISSN

0197-2618

Print_ISBN

0-7803-4067-1

Type

conf

DOI

10.1109/IAS.1997.629020

Filename

629020