Study of circuit sensitivity to interconnect variation

Author

Lin, Yung-Tao ; Spanos, Costas ; Milor, Linda ; Yung-Tao Lin

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

fYear

1997

fDate

35589

Firstpage

28

Lastpage

31

Abstract

Deep submicron technology makes interconnect one of the main factors determining the circuit performance. Previous work shows that interconnect parameters exhibit a significant amount of spatial variation. In this work, we present a methodology to study the influence of the interconnect variation on circuit performance. Parameterized interconnect modeling technology is introduced, and a ring oscillator circuit with interconnect dominant loading is studied

Keywords

SPICE; VLSI; circuit analysis computing; circuit optimisation; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; sensitivity analysis; timing; circuit performance; circuit sensitivity; deep submicron technology; interconnect dominant loading; interconnect variation; parameterized interconnect modeling technology; ring oscillator circuit; spatial variation; Capacitance; Circuit optimization; Circuit simulation; Computational modeling; Curve fitting; Integrated circuit interconnections; Numerical simulation; Process design; Ring oscillators; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Statistical Metrology, 1997 2nd International Workshop on

Conference_Location

Kyoto

Print_ISBN

0-7803-3737-9

Type

conf

DOI

10.1109/IWSTM.1997.629406

Filename

629406