DocumentCode
316941
Title
Statistical simulation methodology for multi-level interconnect contact analysis and step coverage evaluation
Author
Kamohara, Ltaru
Author_Institution
Silvaco Japan, Yokohama, Japan
fYear
1997
fDate
35589
Firstpage
113
Lastpage
116
Abstract
Multi-level interconnect contact step coverage was simulated statistically varying wide range of etching/deposition model parameter and process condition
Keywords
integrated circuit interconnections; semiconductor process modelling; deposition; etching; multi-level interconnect contact step coverage; process model; statistical simulation; Analytical models; Calibration; Data mining; Design methodology; Plasma applications; Plasma sheaths; Plasma simulation; Semiconductor device modeling; Sputter etching; Surfaces;
fLanguage
English
Publisher
ieee
Conference_Titel
Statistical Metrology, 1997 2nd International Workshop on
Conference_Location
Kyoto
Print_ISBN
0-7803-3737-9
Type
conf
DOI
10.1109/IWSTM.1997.629427
Filename
629427
Link To Document