DocumentCode
3170094
Title
Nanoscale FETs and STM lithography
Author
Tucker, J.R. ; Wang, C. ; Shen, T.C.
Author_Institution
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
fYear
1995
fDate
7-9 Aug 1995
Firstpage
425
Lastpage
434
Abstract
This paper outlines a new proposal for silicon nanoelectronics based on STM/AFM lithography, selective deposition of epitaxial silicides, and heterolayer overgrowth. The all-UHV process we envision is completely planarized, and could eventually permit fabrication of 3-dimensional devices and circuit architectures with an unlimited range of possibilities
Keywords
atomic force microscopy; electron beam lithography; insulated gate field effect transistors; nanotechnology; scanning tunnelling microscopy; semiconductor device metallisation; semiconductor technology; 3-dimensional devices; 3D circuit architectures; STM lithography; STM/AFM lithography; Schottky barrier MOSFET; VFET; all-UHV process; complete planarization; epitaxial silicides; heterolayer overgrowth; nanoscale FETs; selective deposition; silicon nanoelectronics; vertical field effect transistor; FETs; Hydrogen; Lithography; MOSFETs; Nanoelectronics; Optical films; Proposals; Resists; Silicides; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
High Speed Semiconductor Devices and Circuits, 1995. Proceedings., IEEE/Cornell Conference on Advanced Concepts in
Conference_Location
Ithaca, NY
ISSN
1079-4700
Print_ISBN
0-7803-3970-3
Type
conf
DOI
10.1109/CORNEL.1995.482536
Filename
482536
Link To Document