Title :
Optimal loop-unrolling mechanisms and architectural extensions for an energy-efficient design of shared register files in MPSoCs
Author :
Ayala, José L. ; Atienza, David ; López-Vallejo, Marisa ; Mendias, J.M. ; Hermida, R. ; López-Barrio, C.A.
Author_Institution :
Departamento de Ingenieria Electronica, Univ. Politecnica de Madrid, Spain
Abstract :
In this paper, we introduce a new hardware/software approach to reduce the energy of the shared register file in upcoming embedded architectures with several VLIW processors. This paper includes a set of architectural extensions and special loop unrolling techniques for the compilers of MPSoC platforms. This complete hardware/software support enables reducing the energy consumed in the register file of MPSoC architectures up to a 60% without introducing performance penalties.
Keywords :
low-power electronics; multiprocessing systems; program compilers; system-on-chip; MPSoC architecture; MPSoC compilers; VLIW processors; embedded architectures; energy-efficient design; hardware-software energy reduction; optimal loop-unrolling; shared register files; Computer architecture; Embedded computing; Embedded software; Energy consumption; Energy efficiency; Hardware; Multimedia systems; Registers; Software performance; VLIW;
Conference_Titel :
Innovative Architecture for Future Generation High-Performance Processors and Systems, 2005
Print_ISBN :
0-7695-2483-4
DOI :
10.1109/IWIA.2005.35
