DocumentCode :
3170275
Title :
Power/ground networks of floating pad design and optimization
Author :
Wei, Li ; Yici, Cai ; Xianlong, Hong
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Volume :
2
fYear :
2002
fDate :
29 June-1 July 2002
Firstpage :
1419
Abstract :
As the fast development of VLSI technology and the rapid increase of scale of chip, especially in the design of SOC, the original pattern of placing all pads on fixed positions cannot ensure high-quality power supply to each individual circuit blocks. In many cases, post-floorplanning power supply optimization cannot guarantee high-quality power supply under limited routing resources. Therefore, a new pattern that pads can be put on any position all around the chip or even on the top of the modules come forth. In this paper, we present a method to decide optimal floating pads based on tree-mode. Testing with examples of MCNC, we find the optimization is encouraging.
Keywords :
VLSI; circuit layout CAD; circuit optimisation; integrated circuit layout; power supply circuits; system-on-chip; trees (mathematics); VLSI technology; floating pad design; floorplanning; optimization; power supply optimization; power/ground network; system-on-chip; tree-mode; Atherosclerosis; Circuits; Constraint optimization; Design optimization; Power supplies; Routing; Tree graphs; Very large scale integration; Voltage; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems and West Sino Expositions, IEEE 2002 International Conference on
Print_ISBN :
0-7803-7547-5
Type :
conf
DOI :
10.1109/ICCCAS.2002.1179046
Filename :
1179046
Link To Document :
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