Title :
A 8-bit MCU design using a four-pipeline architecture
Author :
Lv, Qing-Lan ; Li, Ping
Author_Institution :
Inst. of Microelectron., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fDate :
29 June-1 July 2002
Abstract :
It is found that through improving the system architecture of PIC16C57´s, the microcontroller´s (MCU) execution efficiency can be improved apparently. Two-pipeline architecture in PIC16C57 is replaced by a four-pipeline architecture. Experiment results verify that the designed MCU is compatible functionally with PIC16C57, its execution efficiency is 4 times as high as that of PIC16C57, its system clock reaches above 60MHz.
Keywords :
microcontrollers; pipeline processing; reduced instruction set computing; 60 MHz; 8 bit; MCU design; PIC16C57; RISC microcontroller; four-pipeline architecture; Clocks; Counting circuits; Decoding; H infinity control; Pipeline processing; Registers;
Conference_Titel :
Communications, Circuits and Systems and West Sino Expositions, IEEE 2002 International Conference on
Print_ISBN :
0-7803-7547-5
DOI :
10.1109/ICCCAS.2002.1179055
