DocumentCode
3170540
Title
A research on system-level architecture of single-chip cryptographic data processing
Author
Ze, Tian ; Dunshan, Yu ; Yihao, Zhang ; Shimin, Sheng ; Yulin, Qiu
Author_Institution
Microelectron. R&D Center, Acad. Sinica, Beijing, China
Volume
2
fYear
2002
fDate
29 June-1 July 2002
Firstpage
1486
Abstract
Nowadays, since most information is transmitted by public medias, the security of information is very important, especially of confidential information. The information security system has its particular processing method. The use of cryptographic machine is one of the effective solutions. The hidden trouble of cryptographic machine mainly comes from information processing kernel program and key chip. And in China, information security is being menaced, for most of the key chip involving the information security devices come from abroad. Developing the key chip-set for information security system is a hard and chief task for China. A research on system-level architecture of single-chip cryptographic data processing is presented. The architecture involves microprocessor core architecture, data interface, user ID interface, special component for cryptographic data processing and cryptographic algorithms RSA and CHES VLSI implementation IP module and the true random number generator. All of the functions are necessary for the system on a single cryptographic data processing chip. The architecture, including microprocessor core architecture, is incompatible with any other system, and has a special function to accelerate cryptographic data processing, so it is a very effective way to implement information security chip.
Keywords
VLSI; cryptography; microprocessor chips; system-on-chip; CHES algorithm; IP module; RSA algorithm; VLSI; cryptographic machine; information security system; microprocessor; random number generator; single-chip cryptographic data processing; system-level architecture; system-on-chip; Acceleration; Cryptography; Data processing; Data security; Information processing; Information security; Kernel; Microprocessors; Random number generation; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems and West Sino Expositions, IEEE 2002 International Conference on
Print_ISBN
0-7803-7547-5
Type
conf
DOI
10.1109/ICCCAS.2002.1179060
Filename
1179060
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