Title :
Low phase noise Ku-band PLL-IC with −104.5dBc/Hz at 10kHz offset using SiGe HBT ECL PFD
Author :
Tsutsumi, Koji ; Komaki, Masahiko ; Shimozawa, Mitsuhiro ; Suematsu, Noriharu
Author_Institution :
Mitsubishi Electr. Corp., Kamakura, Japan
Abstract :
This paper describes one of the lowest phase noise Ku-band PLL-IC below 10 kHz offset region using 0.18 ¿m SiGe-BiCMOS process. Since the phase frequency detector (PFD) generates the major portion of phase noise of total PLL in low offset frequency region, SiGe HBT emitter coupled logic (ECL) circuit is employed to reduce 1/f noise of the PFD. The fabricated PLL-IC achieves in-band phase noise of -104.5 dBc/Hz at 10 kHz offset in Ku-band. The calculated FOM (figure of merit) of -227.7 dBc/Hz2 is the lowest value among the reported PLL-ICs at 10 kHz offset.
Keywords :
1/f noise; BiCMOS digital integrated circuits; Ge-Si alloys; bipolar MIMIC; heterojunction bipolar transistors; interference suppression; logic circuits; phase detectors; phase locked loops; phase noise; semiconductor materials; 1/f noise reduction; BiCMOS process; HBT ECL PFD; HBT emitter coupled logic circuit; PLL; SiGe; low phase noise Ku-band PLL-IC; phase frequency detector; phase locked loop; size 0.18 mum; Circuit noise; Coupling circuits; Germanium silicon alloys; Heterojunction bipolar transistors; Logic circuits; Noise reduction; Phase frequency detector; Phase locked loops; Phase noise; Silicon germanium; 1/f noise; Emitter Coupled Logic; Phase Frequency Detector; Phase Locked Loop; flicker noise;
Conference_Titel :
Microwave Conference, 2009. APMC 2009. Asia Pacific
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-2801-4
Electronic_ISBN :
978-1-4244-2802-1
DOI :
10.1109/APMC.2009.5384526
