• DocumentCode
    3170708
  • Title

    Fast cache access with full-map block directory

  • Author

    Peir, Jih-Kwon ; Hsu, WindsorW ; Young, Honesty ; Ong, Shauchi

  • Author_Institution
    CISE Dept., Florida Univ., Gainesville, FL, USA
  • fYear
    1997
  • fDate
    12-15 Oct 1997
  • Firstpage
    578
  • Lastpage
    586
  • Abstract
    There are two concurrent paths in a typical cache access -one through the data array and the other through the tag array. In most cases, the path through the tag array is significantly longer than that through the data array. In this paper, we propose a new scheme that exploits this imbalance in the tag and data paths to improve overall cache performance. Under this scheme, an additional tag directory, the full-map block directory, is used to provide an alternate tag path to speed up cache access for almost all the memory requests. This scheme is based on the observation that spatial locality exists on a cache line basis i.e. cache lines near one another tend to be referenced together. Performance evaluation using the TPC-C benchmark and the SPEC92 benchmark suite demonstrates that this scheme has the potential to improve overall system performance by more than 20%
  • Keywords
    cache storage; fault tolerant computing; performance evaluation; SPEC92 benchmark suite; TPC-C benchmark; cache performance; data array; fast cache access; full-map block directory; spatial locality; system performance; tag array; Art; Logic arrays; Pipelines; Process design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
  • Conference_Location
    Austin, TX
  • ISSN
    1063-6404
  • Print_ISBN
    0-8186-8206-X
  • Type

    conf

  • DOI
    10.1109/ICCD.1997.628924
  • Filename
    628924