Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications

Author

Suh, YongJu ; Sun, Jiangtao ; Horie, Koji ; Itoh, Nobuyuki ; Yoshimasu, Toshihiko

Author_Institution

Grad. Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu, Japan

fYear

2009

fDate

7-10 Dec. 2009

Firstpage

365

Lastpage

368

Abstract

A fully integrated novel power amplifier (PA) using 130 nm CMOS process is presented for electric toll collection (ETC) applications. To obtain good efficiency and high linear gain performance, a novel cascode PA based on a class E PA has been designed, fabricated and fully measured. The proposed PA is a single-ended single-stage amplifier at an operating voltage of only 2 V. The power added efficiency (PAE) of the PA is as high as 42.6% with a gain of 11.4 dB at P1 dB of 13.4 dBm. This CMOS PA includes all matching circuits and biasing circuits, and no external components are required.

Keywords

CMOS integrated circuits; MMIC; power amplifiers; cascode PA; class E PA; electric toll collection; frequency 5.8 GHz; gain 11.4 dB; high efficiency linear CMOS power amplifier; high linear gain performance; matching circuits; power added efficiency; size 130 nm; voltage 2 V; CMOS process; CMOS technology; Circuit synthesis; Gain; High power amplifiers; Impedance matching; Linearity; MOSFET circuits; Power generation; Voltage; CMOS; Electric Toll Collection; High efficiency; Power amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2009. APMC 2009. Asia Pacific

Conference_Location

Singapore

Print_ISBN

978-1-4244-2801-4

Electronic_ISBN

978-1-4244-2802-1

Type

conf

DOI

10.1109/APMC.2009.5384529

Filename

5384529