• DocumentCode
    3170749
  • Title

    Performance evaluations of 3rd order sigma-delta (Σ - Δ) modulators via ASIC implementation

  • Author

    Liao, Yongbo ; Lei, Zhangwei ; Li, Ping

  • Author_Institution
    Inst. of Microelectron., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
  • Volume
    2
  • fYear
    2002
  • fDate
    29 June-1 July 2002
  • Firstpage
    1540
  • Abstract
    A third-order sigma-delta (Σ - Δ) modulator implementation in a Digital Power Amplifier is presented in this paper. The operation is obtained by using a novel combination of architectural features, proper circuit structure selections, specific clocking strategies, and efficient circuit optimization algorithms. Measurement results from fabricated CMOS chip prototypes show a good match with simulations.
  • Keywords
    CMOS integrated circuits; application specific integrated circuits; circuit optimisation; power amplifiers; sigma-delta modulation; ASIC; CMOS chip; circuit optimization algorithm; digital power amplifier; hardware architecture; third-order sigma-delta modulator; Application specific integrated circuits; Computer architecture; Delta-sigma modulation; Digital modulation; Finite impulse response filter; IIR filters; Modulation coding; Power amplifiers; Signal processing algorithms; Signal resolution;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications, Circuits and Systems and West Sino Expositions, IEEE 2002 International Conference on
  • Print_ISBN
    0-7803-7547-5
  • Type

    conf

  • DOI
    10.1109/ICCCAS.2002.1179071
  • Filename
    1179071
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3170749