Title :
CMOS/SOI half-flash A/D converter
Author :
Zhang, Zhengfun ; Yongguang Liu ; L, Zhaoji ; Xu, Shiliu
Author_Institution :
Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fDate :
29 June-1 July 2002
Abstract :
A SOI A/D converter with half-flash architecture is designed and fabricated in the paper. In the converter, an 8-bit conversion consists of two 4-bit all-parallel A/D converters, and a chopper zero-stability architecture is used as a comparator. The converter with a simple structure has the function of voltage offset. The back gate bias structure of CMOS/SOI circuits is developed and the full depletion CMOS/SOI technology is used. The chip area of the converter is 3.5×3.7 mm2, the conversion rate is 1 MS/s, the instantaneous γ-rate is 1×1011 rad (Si)/s, and the total dose radiation level is 1×105 rad (Si).
Keywords :
CMOS integrated circuits; analogue-digital conversion; choppers (circuits); gamma-ray effects; silicon-on-insulator; 1×105 rad; 8 bit; CMOS/SOI; Si; all-parallel A/D converters; back gate bias structure; chopper zero-stability architecture; conversion rate; full depletion technology; half-flash A/D converter; instantaneous γ-rate; total dose radiation level; voltage offset; Analog-digital conversion; CMOS technology; Flip-flops; MOSFET circuits; Paper technology; Radiation hardening; Silicon devices; Silicon on insulator technology; Solid state circuits; Voltage;
Conference_Titel :
Communications, Circuits and Systems and West Sino Expositions, IEEE 2002 International Conference on
Print_ISBN :
0-7803-7547-5
DOI :
10.1109/ICCCAS.2002.1179109