DocumentCode
3171679
Title
A Low-Complexity Layered Decoding Algorithm for LDPC Codes
Author
Zhongxun, Wang ; Qing, Mu
Author_Institution
Inst. of Sci. & Technol. for opto-Electron. Inf., Yan Tai Univ., Yantai, China
Volume
2
fYear
2009
fDate
25-27 Dec. 2009
Firstpage
318
Lastpage
320
Abstract
A Low-complexity Layered Decoding Algorithm for LDPC Codes is proposed. Our modified algorithm reduces the number of operations in variable nodes to lower LDPC decoder power consumption. The modified parts of LDPC decoder architecture is also described. Simulation results show that comparing with SPA and MSA, our algorithm reducing the number of operations nearly to 60% with little performance loss.
Keywords
decoding; parity check codes; LDPC Codes; LDPC decoder architecture; decoder power consumption; low-complexity layered decoding algorithm; low-density parity-check codes; Application software; Bit error rate; Channel capacity; Computer applications; Energy consumption; Iterative decoding; Parity check codes; Performance loss; Scheduling algorithm; Sum product algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Science-Technology and Applications, 2009. IFCSTA '09. International Forum on
Conference_Location
Chongqing
Print_ISBN
978-0-7695-3930-0
Electronic_ISBN
978-1-4244-5423-5
Type
conf
DOI
10.1109/IFCSTA.2009.200
Filename
5384575
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