Subthreshold analog performance of channel engineered SOI CMOS devices and circuits for ultra-low power analog/mixed-signal applications

Author

Chakraborty, S. ; Mallik, A. ; Sarkar, C.K.

Author_Institution

Simplex Infrastructures Ltd., Kolkata

fYear

2007

fDate

16-20 Dec. 2007

Firstpage

150

Lastpage

153

Abstract

Subthreshold analog operation of CMOS devices are very attractive in terms of both very low power dissipation and high voltage gain. In this paper, a systematic investigation, with the help of extensive process and device simulations, of the effects of halo doping [both double-halo (DH) and single-halo (SH) or lateral asymmetric channel (LAC)] on the subthreshold analog performance of 100 nm SOI CMOS devices and circuits is reported. CMOS amplifiers made with the halo implanted devices are found to have higher voltage gain over their conventional counterpart.

Keywords

CMOS analogue integrated circuits; low-power electronics; mixed analogue-digital integrated circuits; silicon-on-insulator; SOI CMOS circuits; SOI CMOS devices; lateral asymmetric channel; mixed-signal applications; subthreshold analog performance; ultra-low power analog applications; CMOS analog integrated circuits; CMOS memory circuits; CMOS technology; Circuit simulation; DH-HEMTs; Los Angeles Council; MOSFET circuits; Power engineering and energy; Silicon on insulator technology; Voltage; CMOS; SOI; Subthreshold; halo; lateral asymmetric channel; mixed-signal; ultra-low power;

fLanguage

English

Publisher

ieee

Conference_Titel

Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on

Conference_Location

Mumbai

Print_ISBN

978-1-4244-1728-5

Electronic_ISBN

978-1-4244-1728-5

Type

conf

DOI

10.1109/IWPSD.2007.4472475

Filename

4472475