DocumentCode
3171925
Title
VITAMIN: Voltage inversion technique to ascertain malicious insertions in ICs
Author
Banga, Mainak ; Hsiao, Michael S.
Author_Institution
Bradley Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
fYear
2009
fDate
27-27 July 2009
Firstpage
104
Lastpage
107
Abstract
We propose an inverted voltage scheme for exciting and pronouncing the behavior of any undesirable logic that may be inserted in the IC manufactured abroad. The inverted voltage scheme is coupled with a sustained vector simulation technique to further enhance the behavioral difference between the genuine and targeted test IC. Experimental results on a variety of ISCAS´89 benchmarks show that we are able to significantly magnify the difference between the genuine and tampered designs. For most of the smaller benchmarks, our inverted voltage method is able to detect the effect of the tamper directly at the primary outputs of the IC, especially when existing techniques fail to make any observable distinction. For the larger circuits, our technique is able to magnify the power consumption of the tampered circuit by several times.
Keywords
integrated circuit manufacture; power consumption; IC manufacturing; VITAMIN; ascertain malicious insertions; power consumption; sustained vector simulation technique; tampered circuit; voltage inversion technique; Benchmark testing; Circuit testing; Electrical fault detection; Fabrication; Fault detection; Information security; Integrated circuit testing; Logic design; MOS devices; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware-Oriented Security and Trust, 2009. HOST '09. IEEE International Workshop on
Conference_Location
Francisco, CA
Print_ISBN
978-1-4244-4805-0
Electronic_ISBN
978-1-4244-4804-3
Type
conf
DOI
10.1109/HST.2009.5224960
Filename
5224960
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