Title :
Power driven partial scan
Author :
Jou, Jing-Yang ; Nien, Ming-Chang
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
The power consumption and testability are two of major considerations in modern VLSI design. A full-scan method had been used widely in the past to improve the testability of sequential circuits. Due to the lower overheads incurred, the partial-scan design has gradually become popular. The authors propose a partial scan selection strategy that bases on the structural analysis approach and considers the area and power overheads simultaneously. A powerful sample-and-search algorithm is used to find the solution that minimizes the user-specified cost function in term of power and area overheads. The experimental results show that the sample-and-search algorithm can effectively find the best solution of the specified cost function for almost all circuits, and the saving of overheads on average for each specific cost function is significant
Keywords :
CMOS logic circuits; VLSI; circuit optimisation; flip-flops; integrated circuit design; logic testing; search problems; sequential circuits; Lee Reddy algorithm; VLSI design; area overhead; full-scan method; minimized user-specified cost function; partial-scan design; power consumption; power driven partial scan; power overhead; sample-and-search algorithm; sequential circuits; structural analysis approach; testability; Circuit testing; Cost function; Energy consumption; Sequential analysis; Sequential circuits; Very large scale integration;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-8206-X
DOI :
10.1109/ICCD.1997.628933